University of Cambridge > Talks.cam > Computer Laboratory Computer Architecture Group Meeting > An Energy-Efficient Patchable Accelerator For Post-Silicon Engineering Changes

An Energy-Efficient Patchable Accelerator For Post-Silicon Engineering Changes

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With the shorter time-to-market and the rising cost in SoC development, the demand for post-silicon programmability has been increasing. Recently, programmable accelerators have attracted more attention as an enabling solution for post-silicon engineering change. However, programmable accelerators suffers from 5∼10X less energy efficiency than fixed-function accelerators mainly due to their extensive use of memories. This paper proposes a highly energy-efficient accelerator which enables post-silicon engineering change by a control patching mechanism. Then, we propose a patch compilation method from a given pair of an original design and a modified design. Experimental results demonstrate that the proposed accelerators offer high energy efficiency competitive to fixed-function accelerators and can achieve about 5X higher efficiency than the existing programmable accelerators.

This talk is part of the Computer Laboratory Computer Architecture Group Meeting series.

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