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System-Level Management of Hybrid Accelerators

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Abstract: Heterogeneous systems that incorporate one or more accelerators with one or more traditional CPUs have the potential to have significantly improved performance and/or energy compared to homogeneous systems. Homogeneity follows a “one size somewhat fits all” design paradigm, whereas heterogeneity instead provides resources with various characteristics, and the ability to implement a computation on the system resource best suited to that computation. My research group has focused on system-level management of these heterogeneous accelerators. In particular we examine the case where the accelerators are composed of reconfigurable logic similar to FPG As. We examine techniques to allocate and schedule reconfigurable logic in a multi-tasking system where multiple (possibly unrelated) applications may simultaneously compete for the resources. In this talk I will give an overview of our approach and discuss some of the issues involved in this type of work. I will also present our efforts to balance the compute ability of applications in a system where those applications do not benefit equally from the accelerator resources.

Bio: Katherine Compton is an Associate Professor at the University of Wisconsin in the Department of Electrical and Computer Engineering. She received her BS, MS, and PhD degrees from the Department of Electrical and Computer Engineering at Northwestern University in 1998, 2000, and 2003, respectively. Her research interests include heterogeneous, GPGPU , and reconfigurable computing systems—in particular the subject of resource management. She is also interested in the architecture of these systems. She has been the program chair of the IEEE Conference on Field-Programmable Custom Computing Machines (FCCM), and the ACM /SIGDA Symposium on Field-Programmable Gate Arrays (FPGA). She was recently the General Chair for FPGA as well, and is currently one of the publicity chairs for the International Conference on Field-Programmable Logic and Applications (FPL) to be held in Oslo in August.

This talk is part of the Computer Laboratory Computer Architecture Group Meeting series.

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