|COOKIES: By using this website you agree that we can place Google Analytics Cookies on your device for performance monitoring.|
Hypervisor Scheduler Enhancement Using OS-Hardware Interactions
If you have a question about this talk, please contact Microsoft Research Cambridge Talks Admins.
This event may be recorded and made available internally or externally via http://research.microsoft.com. Microsoft will own the copyright of any recordings made. If you do not wish to have your image/voice recorded please consider this before attending
As the hypervisor has become a common software layer in conventional software stack and applications are continuously diversifying, computing environments have now undergone increasing gap between end-user software and underlying hardware. In particular, the design principle of lightweight hypervisor causes a blockage to information flow while granting the workload-agnostic hypervisor the entire control of bare-metal hardware resources. The blockage leads the hypervisor to ineffective decisions about CPU resource scheduling, which is a primitive role of arbitrating the competing demands of workload executions, due to the lack of workload information. In this talk, I present two CPU scheduling approaches devised to improve the performance of consolidated workloads using common OS-hardware interactions: 1) Demand-based coordinated scheduling for SMP V Ms, and 2) task-aware scheduling for I/O-intensive and interactive workloads. Firstly, the demand-based coordinated scheduling addresses scheduling issues arising when communication-intensive workloads are hosted on multiprocessor VMs, which share underlying multi-core processors. Inspired by the demand-based coscheduling demonstrated in cluster environments, I devised an SMP VM scheduling scheme that dynamically coordinates vCPUs based on their communication (i.e., inter-processor interrupt). Secondly, task-aware VM scheduling makes a task-oblivious hypervisor scheduler aware of task-level characteristics such as I/O-boundness and user interactivity. To this end, I devised several inference techniques based on per-task CPU time and I/O events that can be captured by OS-hardware interactions.
This talk is part of the Microsoft Research Cambridge, public talks series.
This talk is included in these lists:
Note that ex-directory lists are not shown.
Other listsWednesday HEP-GR Colloquium Palestinians in Israel: Segregation, Discrimination and Democracy Cambridge Finance Workshop Series
Other talksThe gifts of Athena revisited: protectionism, regulation and the British Industrial Revolution, 1700–1800 Topics in Heegaard Floer homology IV Preeclampsia and the risk of cardiovascular disease in later life Public Policy Seminar: Inequality and Education Policy CHERI - Architectural support for software memory protection and compartmentalisation TBC (SP Workshop)