Synopsys Processor Designer - Introduction and demonstration

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• Jeroen Dobbelaere, Synopsys
• Thursday 18 July 2013, 13:00-14:45
• FW11, Computer Laboratory.

If you have a question about this talk, please contact David Chisnall.

Note unusual time and venue

Processor Designer is a tool for designing processors. Based on a description of the processor architecture in the LISA language, the tool is able to generate an instruction set simulator, software tools such as linker and assembler, as well as a LLVM based compiler, RTL (vhdl and verilog) and instruction set documentation.

It also comes with a debugger providing insight in the processor internals, as well as in the software running on the processor. This talk will first give a generic introduction to the tool and the LISA language. The second part (starting at around 14:15 to 14:30) consists of a demonstration of the tool.

This talk is part of the Computer Laboratory Computer Architecture Group Meeting series.

This talk is included in these lists:

• All Talks (aka the CURE list)
• Cambridge talks
• Computer Laboratory Computer Architecture Group Meeting
• Department of Computer Science and Technology talks and seminars
• FW11, Computer Laboratory
• Interested Talks
• School of Technology
• Trust & Technology Initiative - interesting events
• bld31

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