Randomised testing of a microprocessor model using SMT-solver state generation

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• Dr Brian Campbell, Edinburgh
• Tuesday 16 September 2014, 11:00-12:00
• SC04, Computer Laboratory, William Gates Building.

If you have a question about this talk, please contact Prof Simon Moore.

Note unusual time

Brian will present details of their test generation techniques before we dive into specifics about how to use their techniques to test our CHERI processor.

This talk is part of the Computer Laboratory Computer Architecture Group Meeting series.

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