Abstract

Abstract: Cut-through switches provide lower latency at the cost of complexity. New Ethernet speeds (25,50,100,200,400 Gbps) use Reed-Solomon Forward Error Correction to mitigate the assumed bit error rate of _{10E-6 and bring it to} 10E-15. The use of FEC at the physical layer requires additional framing which may not be aligned with frames from the upper layer, resulting in latency and its jitter. The latency mechanism is explained, and it is shown that this may degrade the performance of a cut-through switch to that of a store and forward switch.

Bio: I am a phd student at the computer lab. After submitting my thesis “on the Lowenheim-Skolem-Tarski number of the equi cardinality logic” for an M.Sc. in mathematics (logic and set theory) I joined Mellanox, where I worked on algorithms, including the Mellanox implementation of the Reed-Solomon decoder. Part of my work was to represent the company at the IEEE 802 .3 working group.