Abstract

Strain improves performance in MOSFET devices by increasing carrier mobility and by shifting the band structure of the channel. With the move towards 32 nm device technology, strain needs to be measured accurately on the nanoscale. TEM seems to be a tool of choice for such studies. We present two methods to map strain in microelectronic devices at the nanometer scale. Aberration corrected high resolution transmission electron microscopy (HRTEM) coupled with Geometric Phase Analysis (GPA) provides sufficient signal/noise to measure the displacement fields accurately. Finite Element Method simulations confirm our measurements. The field of view is however limited to an area of 200 nm x 200 nm. To overcome this, we have developed a new technique called dark-field holography based on off-axis electron holography and dark-field imaging. This new technique provides a better strain resolution than HRTEM (reaching 0.05%), a spatial resolution of 4 nm and a field of view of 1 µm. Experiments are performed on the SACTEM -Toulouse, a 200kV Tecnai F20 (FEI) fitted with objective lens aberration corrector (CEOS), a 2k camera (Gatan) and a biprism. Finite element simulations (COMSOL) are performed, including the full 3-dimensional strain distribution. Experimentally determined strains are compared with the results from finite element simulations in the case of a 3D simulation or in the limit cases of a thin or a thick lamella.