(FPT Preview) Modelling and Compensating for Clock Skew Variability in FPGAs
- đ¤ Speaker: Dr Pete Sedcole (Imperial College London)
- đ Date & Time: Friday 28 November 2008, 15:30 - 16:00
- đ Venue: Mahanakorn Laboratory, EEE
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Alastair Smith
Abstract
Abstract not available
Series This talk is part of the CAS FPGA Talks series.
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Friday 28 November 2008, 15:30-16:00