Software lock elision for x86 machine code

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• Amitabha Roy
• Wednesday 26 October 2011, 11:00-12:00
• SC04, Computer Laboratory, William Gates Building.

If you have a question about this talk, please contact Prof Simon Moore.

Software transactional memory has captured the imagination of the research community for much of the past decade but has spectacularly failed to be deployed in either software or spawn any hardware variants. One of the reasons for this is the high development costs of integrating transactional memory with traditional software stacks: programming language, compiler and debugger. On solution to this is to enable transactions to be applied directly to machine code (in this case, x86 machine code) in order to elide legacy locks, an approach that neatly solves all these problem while retaining backward compatibility. There are two major stumbling blocks to this approach, solutions to which will be covered in the talk. The first is that runtime instrumentation of machine code is an expensive affair as users of dynamic binary rewriting engines are aware of. The second is that software transactional memory runtimes are usually built with relaxed language level memory consistency models in mind. The x86 memory consistency model (only recently formally defined) is much stricter needing a whole new approach to building an STM for it.

This talk is part of the Computer Laboratory Computer Architecture Group Meeting series.

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