Abstract

The need to increase performance and power efficiency in modern processors has led to a wide adoption of SIMD vector units. However, writing code that makes efficient use of these units is hard and leads to platform specific implementations. Compiler-based automatic vectorization is one solution for this problem. In particular the Superword-Level Parallelism (SLP) vectorization algorithm is the primary way to automatically generate vector code starting form straight-line scalar code, relying on finding sequences of isomorphic instructions to pack together into vectors. However, this hinders the applicability of the algorithm as isomorphic code sequences are not common in practice.

In this talk we propose a solution to overcome this limitation. We introduce Padded SLP (PSLP), a novel vectorization algorithm that injects a near-minimal number of redundant instructions into the code to transform non-isomorphic sequences into isomorphic versions, enabling their successful vectorization. Our experiments show that PSLP improves vectorization coverage and improves performance across several benchmarks and kernels.