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• Minor Gordon, Computer Laboratory, University of Cambridge
• Tuesday 23 January 2007, 14:30-15:30
• Room FW11, Computer Laboratory, William Gates Building.

If you have a question about this talk, please contact Minor Gordon.

Research designs for high performance web servers have long been defined by the strategy they employ to handle many thousands of requests concurrently. A number of efficient designs have emerged in the last decade, with the most prominent of them (Flash and SEDA ) occupying the middle ground between the extremes of purely thread-based (Apache) and purely event-based (Zeus) concurrency.

What is not well understood is how the various concurrency strategies scale beyond uniprocessors. Multicore and multiprocessor environments induce new sources of latency such as remote cache misses, with slower clock speeds making disk reads even more expensive. Fortunately, with intelligent disk scheduling and a large RAM a web server can significantly reduce the impact of disk I/O on server performance under a typical static file workload. However, once the server is working primarily from memory the main source of latency becomes the memory hierarchy, particularly L2 data cache misses.

I am currently investigating the effects of different concurrency strategies on server software efficiency. In this talk I’ll present the application server I’ve been working on for the past year, explain why I think SPE Cweb2005 is all but useless, and sketch my plans for a thesis evaluation.

This talk is part of the Computer Laboratory Opera Group Seminars series.

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• Room FW11, Computer Laboratory, William Gates Building
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