Some "Real World" Problems in the Analog and Mixed Signal Domains
- π€ Speaker: Kevin Jones (Rambus)
- π Date & Time: Tuesday 26 February 2008, 13:00 - 14:00
- π Venue: Computer Laboratory, William Gates Building, Room SS03
Abstract
Speaker: Kevin Jones
In this talk, we will discuss the design approaches commonly used for mixed mode systems. We will present a synopsis of the way such systems are currently verified in industry and talk about some of the drawbacks of these approaches. We will give a collection of interesting “real world” examples – examples drawn from actual failures of real designs but reduced to their essential elements to make them of a suitable size for academic study – and show some of the key concerns analog/mixed mode designers have in practice. We will present digital, analog and mixed mode examples. Finally, to seed what we hope will be an on-going discussion, we will illustrate some of the novel approaches we are developing to these issues, particularly in the analog domain.
About Dr. Kevin Jones:
Dr. Kevin D. Jones is an Engineering Director at Rambus Inc, Los Altos, CA. He holds a Ph.D. in Computing Science from the University of Manchester, a M.Sc. in Computation from Oxford University and a B.Sc. in Computer Science from the University of Reading.
Dr. Jones’s areas of interest cover practical and theoretical approaches to design and verification of digital and analog circuits and systems. Prior to joining Rambus, he was a member of Research Staff at DEC ’s System Research Center, working in the area of formal methods. Previously, he had been a member of both academic and industrial research groups in the UK, working in the areas of formal specification and verification. For the last 14 years at Rambus, he has been working on, and leading groups working on, practical verification for high speed digital/analog designs. He is currently leading a technology development team focusing on novel design and verification tools and methods for this class of designs.
Series This talk is part of the Computer Laboratory Automated Reasoning Group Lunches series.
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Tuesday 26 February 2008, 13:00-14:00