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SUMMARY:Modern Multi-Level Partitioning for Block-Based IC Design and Mach
 ine Learning -  Christos Sotiriou\, University of Thessaly
DTSTART:20240624T123000Z
DTEND:20240624T133000Z
UID:TALK218065@talks.cam.ac.uk
CONTACT:Robert Mullins
DESCRIPTION:This presentation will present a state-of-the art\, Multi-Leve
 l Graph clusterer\, partitioner called AMASS. AMASS may be used for Machin
 e Learning (ML) and VLSI circuit design. For ML applications\, AMASS may b
 e used to partition arbitrary sized graphs to a fixed number of partitions
 . The key benefit here is scalable AI\, where the original graph may be sc
 aled down and fed to a fixed size NN. For VLSI design\, the partitioned ma
 y be used as a divide and conquer methodology for block-based design of la
 rge ICs. We contrast AMASS against four other popular Partitioning tools\,
  including hMetis\, Patoh\, Kahypar and Kahypar_MT. It is experimentally d
 emonstrated\, on a total of 43\, conference benchmarks that AMASS manages 
 to achieve superior QOR in terms of cutsize\, area ratio and longest graph
  path fragmentation over other approaches.
LOCATION:Computer Lab\, FW11
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