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SUMMARY:Software Lock Elision for x86 Machine Code - Amitabha Roy
DTSTART:20101209T100000Z
DTEND:20101209T110000Z
UID:TALK28345@talks.cam.ac.uk
CONTACT:Microsoft Research Cambridge Talks Admins
DESCRIPTION:Coarse grained locks are a source of bottlenecks in programs t
 hat want to run on machines with large numbers of threads. I will describe
  new techniques that I have developed to allow lock-based programs to use 
 optimistic concurrency control. This lets multiple threads optimistically 
 acquire the same lock\, and run in parallel as long as they do not conflic
 t on the data that they access. A specially constructed software transacti
 onal memory\n(STM) is used to maintain the illusion of mutual exclusion. T
 his approach is toolchain-agnostic\; it works on unmodified native x86 bin
 aries\, meaning that there are no restrictions on source language\, compil
 er or debugger and software lock elision is applied optionally at runtime.
  In this talk\, I will focus on two key challenges in building such a syst
 em. The first is building an STM that can preserve the x86 memory consiste
 ncy model. The second is achieving efficient instrumentation for x86 machi
 ne code. I will show that there is a fundamental tradeoff between safety a
 nd the general applicability of the system in terms of programs that can b
 e handled. The talk will present evaluations of improvements in scalabilit
 y that the system brings to coarse grained locks.\n
LOCATION:Small lecture theatre\, Microsoft Research Ltd\, 7 J J Thomson Av
 enue (Off Madingley Road)\, Cambridge
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