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SUMMARY:HIGH MOBILITY III-V MOSFET TECHNOLOGY - Dr. M. Passlack (Freescale
  Semiconductor Inc.\, Tempe\, Arizona\, USA.)
DTSTART:20060608T131500Z
DTEND:20060608T141500Z
UID:TALK5057@talks.cam.ac.uk
CONTACT:K DAS GUPTA
DESCRIPTION:  In recent years\, fundamental interface issues have been ove
 rcome and\nGaAs MOS technology has advanced to the level of device fabrica
 tion. This\ndevelopment has been enabled by a molecular beam epitaxy (MBE)
  deposited\nGa2O3 template with the unique property of unpinning the Fermi
  level on\nGaAs\, and a GdGaO dielectric layer which provides required ban
 d offsets\nwhile neither disrupting the template nor creating a secondary 
 interface\n[1]. In this invited talk\, we will review interface properties
  and\ncharacterization\, wafer fabrication\, process integration\, high mo
 bility\ntransistor design\, channel mobility\, and transistor data. MOSFET
  wafers\nwith an InGaAs channel layer have been grown by MBE on III-V subs
 trates\nincluding the high-k dielectric Ga2O3/GdGaO stack (k . 20). Electr
 on\nmobilities exceeding 12\,000 and 6\,000 cm2/Vs for sheet carrier\nconc
 entration ns of about 2.5x1012 cm-2 have been measured on InP and GaAs\nba
 sed MOSFET structures\, respectively. GaAs based enhancement-mode MOSFETs\
 nhave been manufactured employing a new\, implant-free device concept\, wh
 ich\nallows one to take advantage of high mobility in MOSFET channel layer
 s\n[2]. Transistor data will be presented.\n\n[1] M. Passlack\, J. Vacuum 
 Science & Technology B\, vol. B23\, no. 4\, pp.\n1773-1781\, 2005.\n\n[2] 
 US Patent 6\,963\,090\n
LOCATION:Small Lecture Theatre\, Cavendish Laboratory\, Department of Phys
 ics
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