Abstract

This presentation will present a state-of-the art, Multi-Level Graph clusterer, partitioner called AMASS . AMASS may be used for Machine Learning (ML) and VLSI circuit design. For ML applications, AMASS may be used to partition arbitrary sized graphs to a fixed number of partitions. The key benefit here is scalable AI, where the original graph may be scaled down and fed to a fixed size NN. For VLSI design, the partitioned may be used as a divide and conquer methodology for block-based design of large ICs. We contrast AMASS against four other popular Partitioning tools, including hMetis, Patoh, Kahypar and Kahypar_MT. It is experimentally demonstrated, on a total of 43, conference benchmarks that AMASS manages to achieve superior QOR in terms of cutsize, area ratio and longest graph path fragmentation over other approaches.